SMP synchronization barrier

• To: oskit-users@fast.cs.utah.edu
• Subject: SMP synchronization barrier
• From: Gianluca Guida <glguida@supereva.it>
• Date: Wed, 2 Apr 2003 20:33:49 +0200
• Sender: owner-oskit-users@fast.cs.utah.edu
• User-Agent: KMail/1.4.3

Hello,
This is a simple processors barrier implementation for the x86 SMP. Can be 
useful for inter processors synchronization.

It has been tested on my dual PIII, but it should be scalable enough  to work 
with more than 2 cpus.

The example kernel at URL http://www.glguida.altervista.org/oskit.html use 
this tool.

Gianluca

Warning

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