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-cd architecture/synth_intel_cyclone10 testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd architecture/synth_greenpak4_dffs_r top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd architecture/synth_greenpak4_dffs_r testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd architecture/synth_easic_error top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd architecture/synth_easic_error testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd architecture/synth_anlogic top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd architecture/synth_anlogic testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd architecture/synth_ice40_dsp mul_16_16_keepABP_.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l mul_16_16_keepABP_.v.log
-cd architecture/synth_ice40_dsp mul_32_32_keepB_.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l mul_32_32_keepB_.v.log
-cd architecture/synth_sf2 top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd architecture/synth_sf2 testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd architecture/synth_efinix_fulladder top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd architecture/synth_efinix_fulladder testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd architecture/ice40_wrapcarry_adders top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd architecture/ice40_wrapcarry_adders testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd architecture/synth_ice40_mem top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd architecture/synth_ice40_mem testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd architecture/synth_sf2_error top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd architecture/synth_sf2_error testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd architecture/synth_intel_error top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd architecture/synth_intel_error testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd architecture/synth_easic top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd architecture/synth_easic testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd architecture/synth_coolrunner2_error top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd architecture/synth_coolrunner2_error testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd architecture/synth_greenpak4 top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd architecture/synth_greenpak4 testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd architecture/synth_coolrunner2_fulladder top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd architecture/synth_coolrunner2_fulladder testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd architecture/synth_intel_cycloneive top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd architecture/synth_intel_cycloneive testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd architecture/synth_xilinx_dsp mul_25s_18s_keepABP_.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l mul_25s_18s_keepABP_.v.log
-cd architecture/synth_xilinx_dsp ug901a.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l ug901a.v.log
-cd architecture/synth_xilinx_dsp mul_32_32_keepB_.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l mul_32_32_keepB_.v.log
-cd architecture/synth_xilinx_dsp ug901b.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l ug901b.v.log
-cd architecture/synth_xilinx_dsp macc_25s_18s__49bitaccum.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l macc_25s_18s__49bitaccum.v.log
-cd architecture/synth_xilinx_srl multien_var_len.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l multien_var_len.v.log
-cd architecture/synth_xilinx_srl rotate_3_var_len.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l rotate_3_var_len.v.log
-cd architecture/synth_xilinx_srl test17d.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l test17d.v.log
-cd architecture/synth_xilinx_srl ug901a.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l ug901a.v.log
-cd architecture/synth_xilinx_srl sr_fixed_length_other_users_port.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l sr_fixed_length_other_users_port.v.log
-cd architecture/synth_xilinx_srl test17a.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l test17a.v.log
-cd architecture/synth_xilinx_srl rotate_3.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l rotate_3.v.log
-cd architecture/synth_xilinx_srl pos_clk_no_enable_no_init_not_inferred_with_reset_var_len.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l pos_clk_no_enable_no_init_not_inferred_with_reset_var_len.v.log
-cd architecture/synth_xilinx_srl neg_clk_no_enable_with_init_with_inferred_N_width.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l neg_clk_no_enable_with_init_with_inferred_N_width.v.log
-cd architecture/synth_xilinx_srl test21b.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l test21b.v.log
-cd architecture/synth_xilinx_srl pos_clk_no_enable_no_init_not_inferred_with_reset.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l pos_clk_no_enable_no_init_not_inferred_with_reset.v.log
-cd architecture/synth_xilinx_srl test17c.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l test17c.v.log
-cd architecture/synth_xilinx_srl multien.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l multien.v.log
-cd architecture/synth_xilinx_srl sr_var_length_other_users_port.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l sr_var_length_other_users_port.v.log
-cd architecture/synth_xilinx_srl neg_clk_no_enable_with_init_with_inferred_with_reset_var_len.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l neg_clk_no_enable_with_init_with_inferred_with_reset_var_len.v.log
-cd architecture/synth_xilinx_srl pos_clk_no_enable_no_init_not_inferred_N_width.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l pos_clk_no_enable_no_init_not_inferred_N_width.v.log
-cd architecture/synth_xilinx_srl sr_var_length_other_users_xor.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l sr_var_length_other_users_xor.v.log
-cd architecture/synth_xilinx_srl rotate_3_fdre.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l rotate_3_fdre.v.log
-cd architecture/synth_xilinx_srl rotate_7_fdre_reset.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l rotate_7_fdre_reset.v.log
-cd architecture/synth_xilinx_srl ug901b.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l ug901b.v.log
-cd architecture/synth_xilinx_srl test17b.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l test17b.v.log
-cd architecture/synth_xilinx_srl neg_clk_no_enable_with_init_with_inferred_with_reset.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l neg_clk_no_enable_with_init_with_inferred_with_reset.v.log
-cd architecture/synth_xilinx_srl rotate_7_fdre_param.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l rotate_7_fdre_param.v.log
-cd architecture/synth_xilinx_srl ug901c.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l ug901c.v.log
-cd architecture/synth_xilinx_srl test17e.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l test17e.v.log
-cd architecture/synth_xilinx_srl multiclock_var_len.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l multiclock_var_len.v.log
-cd architecture/synth_xilinx_srl sr_fixed_length_other_users_xor.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l sr_fixed_length_other_users_xor.v.log
-cd architecture/synth_xilinx_srl multiclock.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l multiclock.v.log
-cd architecture/synth_xilinx_srl test21a.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l test21a.v.log
-cd architecture/synth_xilinx_srl test20.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l test20.v.log
-cd architecture/synth_intel_cycloneiv top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd architecture/synth_intel_cycloneiv testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd architecture/synth_coolrunner2 top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd architecture/synth_coolrunner2 testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd architecture/synth_ecp5_wide_ffs top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd architecture/synth_ecp5_wide_ffs testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd architecture/synth_gowin_error top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd architecture/synth_gowin_error testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd architecture/synth_ecp5_error top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd architecture/synth_ecp5_error testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd architecture/synth_anlogic_fsm top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd architecture/synth_anlogic_fsm testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd architecture/synth_intel_cyclonev top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd architecture/synth_intel_cyclonev testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd architecture/xilinx_srl top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd architecture/xilinx_srl testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd architecture/synth_ice40_error top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd architecture/synth_ice40_error testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd architecture/synth_achronix top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd architecture/synth_achronix testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd architecture/synth_anlogic_error top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd architecture/synth_anlogic_error testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd architecture/synth_xilinx_error top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd architecture/synth_xilinx_error testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd architecture/synth_ice40_fulladder top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd architecture/synth_ice40_fulladder testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd architecture/synth_ice40 top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd architecture/synth_ice40 testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd yosys/yosys_backends top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd yosys/yosys_header top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd yosys/yosys_quiet top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd yosys/yosys_write_des_to_file top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd yosys/yosys_frontends top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd yosys/yosys_no_footer top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd yosys/yosys_regexp top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd yosys/yosys_help_for_command top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd yosys/yosys_tcl_script top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd yosys/yosys_no_banner top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd yosys/yosys_enable_tracing top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd yosys/yosys_regexp_w top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd yosys/yosys_synth top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd yosys/yosys top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd yosys/yosys_abort top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd yosys/yosys_script top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd yosys/yosys_regexp_e top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd yosys/yosys_detailed_timing top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd yosys/yosys_command_list top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd yosys/yosys_time top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd yosys/yosys_dependencies top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd yosys/yosys_exec_command top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd yosys/yosys_log_file top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd yosys/yosys_globally_en_log_mes top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd yosys/yosys_version top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd yosys/yosys_macro top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd yosys/yosys_randomize_alloc_point_addr top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd yosys/yosys_headers top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd yosys/yosys_help top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd yosys/yosys_log_file_lb_mode top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd bigsim/picorv32/sim testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd bigsim/picorv32/rtl picorv32.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l picorv32.v.log
-cd bigsim/navre/sim sieve.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l sieve.v.log
-cd bigsim/navre/sim bench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l bench.v.log
-cd bigsim/navre/rtl softusb_navre.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l softusb_navre.v.log
-cd regression common.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l common.v.log
-cd regression/issue_00931 top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd regression/issue_01093 top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd regression/issue_01023 top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd regression/issue_00888 top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd regression/issue_00085 top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd regression/issue_00085 top_fault.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top_fault.v.log
-cd regression/issue_00085 testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd regression/issue_00091 top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd regression/issue_00091 testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd regression/issue_01014 top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd regression/issue_01259 top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd regression/issue_01223 top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd regression/issue_01220 top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd regression/issue_00289 top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd regression/issue_00289 testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd regression/issue_01161 top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd regression/issue_00283 top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd regression/issue_00283 testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd regression/issue_00342 top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd regression/issue_00342 testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd regression/issue_00642 top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
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-cd regression/issue_00708 top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd regression/issue_00835 top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd regression/issue_00083 top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
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-cd regression/issue_00865 top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd regression/issue_00018 top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd regression/issue_00018 testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd regression/issue_00981 top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd regression/issue_00639 top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd regression/issue_00639 top_new.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top_new.v.log
-cd regression/issue_00826 top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd regression/issue_00527 sd_rrmux.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l sd_rrmux.v.log
-cd regression/issue_00086 top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
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-cd regression/issue_00086 testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd regression/issue_00432 top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
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-cd regression/issue_00084 top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
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-cd regression/issue_00128 top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
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-cd regression/issue_00361 top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd regression/issue_00361 testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd regression/issue_00253 top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
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-cd regression/issue_00102 top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd regression/issue_00102 testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd regression/issue_00186 top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
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-cd regression/issue_00182 top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
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-cd regression/issue_00524 top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd regression/issue_00111 top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
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-cd regression/issue_01284 testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd regression/issue_00781 top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd regression/issue_00781 testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd regression/issue_00867 top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd regression/issue_01033 top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd regression/issue_00093 top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
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-cd regression/issue_00210 top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd regression/issue_00210 testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd regression/issue_00088 top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd regression/issue_00088 testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd regression/issue_00582 top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd regression/issue_00582 testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd regression/issue_00457 top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd regression/issue_00457 testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
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-cd regression/issue_00982 top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd regression/issue_00306 top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd regression/issue_00306 testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd regression/issue_00961 top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd regression/issue_01132 top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd regression/issue_00635 top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd regression/issue_00635 testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd regression/issue_00065 top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd regression/issue_00065 testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd regression/issue_00623 top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd regression/issue_00134 top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd regression/issue_00134 testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd regression/issue_00391 top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd regression/issue_00391 testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd regression/issue_00391 top_clean.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top_clean.v.log
-cd regression/issue_00089 top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd regression/issue_00089 testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd regression/issue_00349 top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd regression/issue_00349 testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd regression/issue_00317 top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd regression/issue_00317 testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd regression/issue_01128 top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd regression/issue_00955 top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd regression/issue_01329 dff.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l dff.v.log
-cd regression/issue_00329 top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd regression/issue_00954 top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd regression/issue_01070 top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd regression/issue_01047 top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd regression/issue_01216 top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd regression/issue_00287 top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd regression/issue_00287 testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd regression/issue_00081 top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd regression/issue_00081 top_fault.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top_fault.v.log
-cd regression/issue_00081 testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd regression/issue_00656 top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd regression/issue_00737 top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd regression/issue_00655 top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd regression/issue_00655 testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd regression/issue_00655/verilog/config_minimal lm32_config.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l lm32_config.v.log
-cd regression/issue_00655/verilog/config_lite lm32_config.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l lm32_config.v.log
-cd regression/issue_00655/verilog/config lm32_config.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l lm32_config.v.log
-cd regression/issue_00655/verilog/submodule/test lm32_config.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l lm32_config.v.log
-cd regression/issue_00655/verilog/submodule/test tb_lm32_system.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l tb_lm32_system.v.log
-cd regression/issue_00655/verilog/submodule/rtl lm32_dp_ram.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l lm32_dp_ram.v.log
-cd regression/issue_00655/verilog/submodule/rtl lm32_addsub.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l lm32_addsub.v.log
-cd regression/issue_00655/verilog/submodule/rtl lm32_ram.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l lm32_ram.v.log
-cd regression/issue_00655/verilog/submodule/rtl lm32_debug.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l lm32_debug.v.log
-cd regression/issue_00655/verilog/submodule/rtl lm32_instruction_unit.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l lm32_instruction_unit.v.log
-cd regression/issue_00655/verilog/submodule/rtl lm32_decoder.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l lm32_decoder.v.log
-cd regression/issue_00655/verilog/submodule/rtl lm32_interrupt.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l lm32_interrupt.v.log
-cd regression/issue_00655/verilog/submodule/rtl lm32_logic_op.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l lm32_logic_op.v.log
-cd regression/issue_00655/verilog/submodule/rtl lm32_include.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l lm32_include.v.log
-cd regression/issue_00655/verilog/submodule/rtl lm32_top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l lm32_top.v.log
-cd regression/issue_00655/verilog/submodule/rtl lm32_mc_arithmetic.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l lm32_mc_arithmetic.v.log
-cd regression/issue_00655/verilog/submodule/rtl lm32_adder.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l lm32_adder.v.log
-cd regression/issue_00655/verilog/submodule/rtl lm32_dcache.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l lm32_dcache.v.log
-cd regression/issue_00655/verilog/submodule/rtl lm32_jtag.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l lm32_jtag.v.log
-cd regression/issue_00655/verilog/submodule/rtl lm32_icache.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l lm32_icache.v.log
-cd regression/issue_00655/verilog/submodule/rtl lm32_cpu.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l lm32_cpu.v.log
-cd regression/issue_00655/verilog/submodule/rtl lm32_load_store_unit.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l lm32_load_store_unit.v.log
-cd regression/issue_00655/verilog/submodule/rtl lm32_itlb.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l lm32_itlb.v.log
-cd regression/issue_00655/verilog/submodule/rtl lm32_multiplier.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l lm32_multiplier.v.log
-cd regression/issue_00655/verilog/submodule/rtl lm32_dtlb.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l lm32_dtlb.v.log
-cd regression/issue_00655/verilog/submodule/rtl jtag_tap_spartan6.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l jtag_tap_spartan6.v.log
-cd regression/issue_00655/verilog/submodule/rtl jtag_cores.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l jtag_cores.v.log
-cd regression/issue_00655/verilog/submodule/rtl lm32_shifter.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l lm32_shifter.v.log
-cd regression/issue_00071 top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd regression/issue_00071 top_fault.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top_fault.v.log
-cd regression/issue_00071 testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd regression/issue_01225 top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd regression/issue_00810/src skid_buffer.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l skid_buffer.v.log
-cd regression/issue_00810/src Master_AXI_Read_Data_Channel.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l Master_AXI_Read_Data_Channel.v.log
-cd regression/issue_00810/src Down_Counter_Zero.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l Down_Counter_Zero.v.log
-cd regression/issue_00810/src Master_AXI_Write_Data_Channel.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l Master_AXI_Write_Data_Channel.v.log
-cd regression/issue_00810/src Delay_Line.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l Delay_Line.v.log
-cd regression/issue_00810/src Master_AXI_Write_Sequencer.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l Master_AXI_Write_Sequencer.v.log
-cd regression/issue_00810/src skid_buffer_datapath.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l skid_buffer_datapath.v.log
-cd regression/issue_00810/src Master_AXI_Transactor.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l Master_AXI_Transactor.v.log
-cd regression/issue_00810/src posedge_pulse_generator.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l posedge_pulse_generator.v.log
-cd regression/issue_00810/src Annuller.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l Annuller.v.log
-cd regression/issue_00810/src Master_AXI_Read_Sequencer.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l Master_AXI_Read_Sequencer.v.log
-cd regression/issue_00810/src pulse_to_level.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l pulse_to_level.v.log
-cd regression/issue_00810/src skid_buffer_fsm.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l skid_buffer_fsm.v.log
-cd regression/issue_00810/src Master_AXI_Write_Response_Channel.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l Master_AXI_Write_Response_Channel.v.log
-cd regression/issue_00810/src faxi_master.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l faxi_master.v.log
-cd regression/issue_00810/src Master_AXI_Address_Channel.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l Master_AXI_Address_Channel.v.log
-cd regression/issue_01217 top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd regression/issue_00449 top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd regression/issue_00174 top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
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-cd simple common.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l common.v.log
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-cd simple/clk2fflogic_latch top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
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-cd simple/nlutmap_opt top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd simple/nlutmap_opt testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd simple/muxcover top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd simple/muxcover testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd simple/dff2dffe_error top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd simple/dff2dffe_error testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd simple/tristate_proc_asmt top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd simple/tristate_proc_asmt testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd simple/proc_arst top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd simple/proc_arst testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd simple/opt_lut_ice40 top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd simple/opt_lut_ice40 testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd simple/async2sync top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd simple/async2sync testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd simple/muxcover_mux8 top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd simple/muxcover_mux8 testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd simple/fsm top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd simple/fsm testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd simple/share_fsm top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd simple/share_fsm testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd simple/shregmap top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd simple/shregmap testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd simple/share_shr top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd simple/share_shr testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd simple/zinit top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd simple/zinit testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd simple/proc_arst_reduce top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd simple/proc_arst_reduce testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd simple/tristate_if top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd simple/tristate_if testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd simple/full_adder top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd simple/full_adder testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd simple/extract_counter_sync_reset top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd simple/extract_counter_sync_reset testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd simple/fsm_export top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd simple/fsm_export testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd simple/hierarchy_huge top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd simple/hierarchy_huge testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd simple/hierarchy_huge/yosys_rocket freechips.rocketchip.system.LowRiscConfig.behav_srams.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l freechips.rocketchip.system.LowRiscConfig.behav_srams.v.log
-cd simple/hierarchy_huge/yosys_rocket SimDTM.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l SimDTM.v.log
-cd simple/hierarchy_huge/yosys_rocket plusarg_reader.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l plusarg_reader.v.log
-cd simple/hierarchy_huge/yosys_rocket AsyncResetReg.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l AsyncResetReg.v.log
-cd simple/hierarchy_huge/yosys_rocket EICG_wrapper.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l EICG_wrapper.v.log
-cd simple/wreduce_adder top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd simple/wreduce_adder testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd simple/simplemap_mem_slice_concat top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd simple/simplemap_mem_slice_concat testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd simple/opt top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd simple/opt testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd simple/nlutmap_error top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd simple/nlutmap_error testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd simple/ice40_dsp_mult_signed top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd simple/ice40_dsp_mult_signed testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd simple/submod_error top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd simple/submod_error testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd simple/wreduce_mul top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd simple/wreduce_mul testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd simple/ice40_dsp_mult_acc top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd simple/ice40_dsp_mult_acc testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd simple/nlutmap top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd simple/nlutmap testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd simple/extract_counter_negative_reset top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd simple/extract_counter_negative_reset testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd simple/hierarchy top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd simple/hierarchy testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd simple/memory words.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l words.v.log
-cd simple/memory top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd simple/memory testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd simple/dffsr top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd simple/dffsr testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd simple/alu top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd simple/alu testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd simple/attrmap top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd simple/attrmap testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd simple/tribuf_logic top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd simple/tribuf_logic testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd simple/extract_counter_no_reset top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd simple/extract_counter_no_reset testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd simple/zinit_error top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd simple/zinit_error synth.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l synth.v.log
-cd simple/zinit_error testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd simple/fsm_export_error top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd simple/fsm_export_error testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd simple/iopadmap top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd simple/iopadmap testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd simple/synth top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd simple/synth testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd simple/flowmap top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd simple/flowmap testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd simple/wreduce_reduce top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd simple/wreduce_reduce testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd simple/extract_counter top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd simple/extract_counter testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd simple/fsm_recode_error top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd simple/fsm_recode_error testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd simple/tristate_const_data top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd simple/tristate_const_data testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd simple/dffc top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd simple/dffc testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd simple/extract top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd simple/extract testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd simple/dffr top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd simple/dffr testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd simple/uniquify top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd simple/uniquify testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd simple/shregmap_resetable top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd simple/shregmap_resetable testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd simple/opt_merge_share_all top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd simple/opt_merge_share_all testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd simple/tribuf top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd simple/tribuf testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd simple/tristate_const_1 top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd simple/tristate_const_1 testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd simple/memory_bram_error rules.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l rules.v.log
-cd simple/memory_bram_error words.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l words.v.log
-cd simple/memory_bram_error top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd simple/memory_bram_error testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd simple/memory_single_port words.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l words.v.log
-cd simple/memory_single_port top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd simple/memory_single_port testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd simple/opt_demorgan top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd simple/opt_demorgan testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd simple/expose top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd simple/expose testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd simple/opt_demorgan_reduce top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd simple/opt_demorgan_reduce testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd simple/macc top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd simple/macc testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd simple/extract_error top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd simple/extract_error testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd simple/opt_expr top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd simple/opt_expr testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd simple/extract_counter_error top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd simple/extract_counter_error testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd simple/inout_port top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd simple/inout_port testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd simple/ice40_dsp_mult_b_larger top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd simple/ice40_dsp_mult_b_larger testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd simple/share top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd simple/share testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd simple/design_import top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd simple/design_import testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd simple/prep_error top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd simple/prep_error testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd simple/ice40_dsp_mult top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd simple/ice40_dsp_mult testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd simple/hierarchy_error top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd simple/hierarchy_error testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd simple/ice40_dsp_mult_a_larger top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd simple/ice40_dsp_mult_a_larger testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd simple/dffcp top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd simple/dffcp testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd simple/fsm_opt top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd simple/fsm_opt testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd simple/fsm_unreach top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd simple/fsm_unreach testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd simple/aigmap top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd simple/aigmap testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd simple/simplemap top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd simple/simplemap testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd simple/tristate top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd simple/tristate testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd simple/share_macc top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd simple/share_macc testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd simple/dffsr2dff top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd simple/dffsr2dff testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd simple/opt_lut top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd simple/opt_lut testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd simple/dff2dffs top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd simple/dff2dffs testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd simple/synth_error top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd simple/synth_error testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd simple/prep top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd simple/prep testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd simple/techmap top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd simple/techmap testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd simple/fsm_command top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd simple/fsm_command testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd simple/dff2dffe_unmap top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd simple/dff2dffe_unmap testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd simple/wreduce_div top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd simple/wreduce_div testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd simple/fsm_recode top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd simple/fsm_recode testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd simple/opt_merge_reduce top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd simple/opt_merge_reduce testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd simple/flowmap_latch top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd simple/flowmap_latch testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd simple/clk2fflogic_mem top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd simple/clk2fflogic_mem testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd simple/submod_mem top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd simple/submod_mem testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd simple/wreduce_memx testbench_.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench_.v.log
-cd simple/wreduce_memx top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd simple/wreduce_memx top_.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top_.v.log
-cd simple/wreduce_memx testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd simple/clk2fflogic top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd simple/clk2fflogic testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd simple/extract_counter_down top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd simple/extract_counter_down testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd simple/expose_ffs top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd simple/expose_ffs testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd simple/dff_d0 top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd simple/dff_d0 testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd simple/shregmap_error top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd simple/shregmap_error testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd simple/inout_port_demote top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd simple/inout_port_demote testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd simple/submod top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd simple/submod testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd simple/expose_dff top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd simple/expose_dff testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd simple/test_pmgen top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd simple/test_pmgen testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd simple/simplemap_reduce top.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.v.log
-cd simple/simplemap_reduce testbench.v -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l testbench.v.log
-cd verific/sva gotorep.sv -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l gotorep.sv.log
-cd verific/sva intersect.sv -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l intersect.sv.log
-cd verific/sva seq_or.sv -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l seq_or.sv.log
-cd verific/sva until_trig.sv -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l until_trig.sv.log
-cd verific/sva until.sv -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l until.sv.log
-cd verific/sva firstmatch.sv -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l firstmatch.sv.log
-cd verific/sva seq_and.sv -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l seq_and.sv.log
-cd verific/sva within.sv -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l within.sv.log
-cd verific/sva nonconsrep.sv -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l nonconsrep.sv.log
-cd verific/sva triggered.sv -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l triggered.sv.log
-cd verific/sva repzero.sv -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l repzero.sv.log
-cd verific/sva consrep.sv -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l consrep.sv.log
-cd verific/opers rednor.sv -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l rednor.sv.log
-cd verific/opers wide_mux.sv -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l wide_mux.sv.log
-cd verific/opers wselect.sv -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l wselect.sv.log
-cd verific/opers sel_mux.sv -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l sel_mux.sv.log
-cd verific/opers select.sv -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l select.sv.log
-cd verific/vhdl tb.sv -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l tb.sv.log
-cd regression/issue_01145 top.sv -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l top.sv.log
-cd regression/issue_01329 synchronizer.sv -writepp -parse -nocache -nobuiltin -nonote -noinfo -timescale=1ns/1ns -l synchronizer.sv.log